Home DBCE News & Events Knowledge Sharing Session on “Recent trends in Formal Verification” & “High Speed SRAMs and Recent Trends”

Knowledge Sharing Session on “Recent trends in Formal Verification” & “High Speed SRAMs and Recent Trends”

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The Department of Electronics and Telecommunication organized its monthly Knowledge Sharing Session, under the R&D cell on 25th March 2021 from 4:00 to 5:00 pm in E9 Lab (Second floor). The Knowledge Sharing Session initiative involves two activities namely a Technical Paper presentation and some recent trends whose main motive was to update Faculty members with the latest trends in Technology and Research.

The first session was taken up by Prof. D.S Vidhya and the second session by Dr. Shreyas Simu.

Prof. D.S Vidhya presented a technical talk titled “Recent trends in Formal Verification”. Verification through traditional simulation applies a large number of input vectors to the design and then compares the resulting output vectors with actual vectors for functional correctness. As the designs become more complex and require massive input vectors for testing the design. Regressive testing with traditional simulation tools becomes bottleneck in the design flow, so formal verification is an alternative to traditional simulation. The demand for formal verification in the SoC designs in the context of hardware is high because of its cost and accuracy. The talk concluded that the outcomes of the verification techniques suggests that DFNN based technique improves the training accuracy and optimizes the hardware resources like area, power than the FFNN based technique.

R&D Session ETC

Dr. Shreyas Simu presented a technical talk titled “High Speed SRAMs and Recent Trends” He started with explaining the difference between SRAM and DRAM and explained in detail the SRAM 6T bitcell structure and its working, the read operation and write operation. He also spoke about CMOS, BiCMOS and SOI technology, FDSOI and PDSOI technology and comparison between them. He then Presented the results of BiCMOS decoder, invertor and compared the existing systems with design of my BiCMOS Inverter. Future trends in FinFETs with 7nm technology were also discussed.

R&D-Session-ETC1

The event was encouraged by R&D Chair Dr. Varsha Turkar and coordinated by Prof. Flavia Leitao. Both the sessions was knowledgeable & received good feedback from the audience.

 

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